1、AT89C51外文翻译毕业设计AT89C51外文翻译DescriptionThe AT89C51 is a low-power high-performance CMOS 8-bit microcomputer with 4K bytes of Flash Programmable and Erasable Read Only Memory PEROM The device is manufactured using Atmels high density nonvolatile memory technology and is compatible with the industry sta 。

2、ndard MCS-51 instruction-set and pinout The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer By combining a versatile 8-bit CPU with Flash on a monolithic chip the Atmel AT89C51 is a powerful microcomputer which provides a highly 。

3、 flexible and cost effective solution to many embedded control applicationsFeaturesCompatible with MCS-51 Products4K Bytes of In-System Reprogrammable Flash Memory Endurance 1000 WriteErase CyclesFully Static Operation 0 Hz to 24 MHzThree-Level Program Memory Lock128 x 8-Bit Internal RAM32 Programma 。

4、ble IO LinesTwo 16-Bit TimerCountersSix Interrupt SourcesProgrammable Serial ChannelLow Power Idle and Power Down ModesThe AT89C51 provides the following standard features 4K bytes of Flash128 bytes of RAM 32 IO lines two 16-bit timercounters a five vector two-level interrupt architecture a full dup 。

5、lex serial port on-chip oscillator and clock circuitry In addition the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes The Idle Mode stops the CPU while allowing the RAM timercounters serial port and interrupt system。

6、to continue functioning The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware resetVCCSupply voltageGNDGroundPort 0Port 0 is an 8-bit open-drain bi-directional IO port As an output port each pin can sink eight TTL inputs When 。

7、 1s are written to port 0 pins the pins can be used as high-impedance inputs Port 0 may also be configured to be the multiplexed low-order addressdata bus during accesses to external program and data memory In this mode P0 has internal pullupsPort 0 also receives the code bytes during Flash programm 。

8、ing and outputs the code bytes during program verification External pullups are required during program verification Port 1Port 1 is an 8-bit bi-directional IO port with internal pullupsThe Port 1 output buffers can sinksource four TTL inputsWhen 1s are written to Port 1 pins they are pulled high by 。

9、 the internal pullups and can be used as inputs As inputsPort 1 pins that are externally being pulled low will source current IIL because of the internal pullupsPort 1 also receives the low-order address bytes during Flash programming and verification Port 2Port 2 is an 8-bit bi-directional IO port。

10、with internal pullupsThe Port 2 output buffers can sinksource four TTL inputsWhen 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs As inputsPort 2 pins that are externally being pulled low will source current IIL because of the internal pullups Por 。

11、t 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses MOVX DPTR In this application it uses strong internal pullups when emitting 1s During accesses to external data memory that use 8-bit addresses MOVX 。

12、 RI Port 2 emits the contents of the P2 Special Function Register Port 2 also receives the high-order address bits and some control signals during Flash programming and verificationPort 3Port 3 is an 8-bit bi-directional IO port with internal pullups The Port 3 output buffers can sinksource four TTL 。

13、 inputsWhen 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs As inputsPort 3 pins that are externally being pulled low will source current IIL because of the pullups Port 3 also serves the functions of various special features of the AT89C51 as lis 。

14、ted belowPort 3 also receives some control signals for Flash programming and verification RSTReset input A high on this pin for two machine cycles while the oscillator is running resets the device ALEPROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to ex 。

15、ternal memory This pin is also the program pulse input PROG during Flash programming In normal operation ALE is emitted at a constant rate of 16 the oscillator frequency and may be used for external timing or clocking purposes Note however that one ALE pulse is skipped during each access to external 。

16、 DataMemory If desired ALE operation can be disabled by setting bit 0 of SFR location 8EH With the bit set ALE is active only during a MOVX or MOVC instruction Otherwise the pin is weakly pulled high Setting the ALE-disable bit has no effect if the microcontroller is in external execution modePSENPr 。

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标题：AT89C51|AT89C51外文翻译毕业设计